215 lines
6.6 KiB
NASM
215 lines
6.6 KiB
NASM
/*
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SST_Atomic_sparc.asm
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Author: Patrick Baggett
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Created: 12/28/2011
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Purpose:
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32-bit assembly for SPARCv9 processors (aka v8+)
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Older SPARC CPUs (e.g. sun4m) are not supported.
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Assembles with Solaris assembler or GNU as.
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License:
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This program is free software. It comes without any warranty, to
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the extent permitted by applicable law. You can redistribute it
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and/or modify it under the terms of the Do What The Fuck You Want
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To Public License, Version 2, as published by Sam Hocevar. See
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http://sam.zoy.org/wtfpl/COPYING for more details.
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*/
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.global SST_Atomic_Add
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.global SST_Atomic_AddPtr
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.global SST_Atomic_And
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.global SST_Atomic_Or
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.global SST_Atomic_Xor
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.global SST_Atomic_Not
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.global SST_Atomic_AddReturn
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.global SST_Atomic_AddPtrReturn
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.global SST_Atomic_AndReturn
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.global SST_Atomic_OrReturn
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.global SST_Atomic_XorReturn
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.global SST_Atomic_NotReturn
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.global SST_Atomic_ExchangeAdd
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.global SST_Atomic_ExchangeAddPtr
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.global SST_Atomic_Exchange
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.global SST_Atomic_ExchangePtr
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.global SST_Atomic_CAS
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.global SST_Atomic_CASPtr
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.global SST_Atomic_LoadAcquire
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.global SST_Atomic_LoadAcquirePtr
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.global SST_Atomic_StoreRelease
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.global SST_Atomic_StoreReleasePtr
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/*
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This is for 32-bit SPARC code, so the pointer versions are the same as
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the non-pointer versions.
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These are all leaf functions, so %o0-%o5 and %g1 are legal to use.
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*/
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/* void SST_Atomic_Add(volatile int* x, int value) */
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/* void SST_Atomic_AddPtr(volatile void* x, int value) */
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/* void* SST_Atomic_AddPtrReturn(volatile void* x, int value) */
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/* int SST_Atomic_AddReturn(volatile int* x, int value) */
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SST_Atomic_Add:
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SST_Atomic_AddPtr:
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SST_Atomic_AddReturn:
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SST_Atomic_AddPtrReturn:
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ld [%o0], %o4 /* o4 = *x */
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1:
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add %o1, %o4, %o5 /* o5 = *x + value */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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add %o1, %o5, %o0 /* could do nop, but delay slot is free.
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then we can make the "Return" versions
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use the same code path */
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/* void SST_Atomic_And(volatile int* x, int value) */
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/* int SST_Atomic_AndReturn(volatile int* x, int value) */
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SST_Atomic_And:
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SST_Atomic_AndReturn:
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ld [%o0], %o4 /* o4 = *x */
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1:
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and %o1, %o4, %o5 /* o5 = *x & value */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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and %o1, %o5, %o0 /* could do nop, but delay slot is free.
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then we can make the "Return" versions
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use the same code path */
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/* void SST_Atomic_Or(volatile int* x, int value) */
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/* int SST_Atomic_OrReturn(volatile int* x, int value) */
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SST_Atomic_Or:
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SST_Atomic_OrReturn:
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ld [%o0], %o4 /* o4 = *x */
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1:
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or %o1, %o4, %o5 /* o5 = *x | value */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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or %o1, %o5, %o0 /* could do nop, but delay slot is free.
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then we can make the "Return" versions
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use the same code path */
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/* void SST_Atomic_Xor(volatile int* x, int value) */
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/* int SST_Atomic_XorReturn(volatile int* x, int value) */
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SST_Atomic_Xor:
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SST_Atomic_XorReturn:
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ld [%o0], %o4 /* o4 = *x */
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1:
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xor %o1, %o4, %o5 /* o5 = *x | value */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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xor %o1, %o5, %o0 /* could do nop, but delay slot is free.
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then we can make the "Return" versions
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use the same code path */
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/* void SST_Atomic_Not(volatile int* x) */
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/* int SST_Atomic_NotReturn(volatile int* x) */
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SST_Atomic_Not:
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SST_Atomic_NotReturn:
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ld [%o0], %o4 /* o4 = *x */
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1:
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not %o4, %o5 /* o5 = ~*x */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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not %o4, %o0 /* could do nop, but delay slot is free.
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then we can make the "Return" versions
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use the same code path */
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/* int SST_Atomic_Exchange(volatile int* x, int value) */
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/* int SST_Atomic_ExchangePtr(volatile void** x, void* value) */
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SST_Atomic_Exchange:
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SST_Atomic_ExchangePtr:
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swap [%o0], %o1 /* swap(*x, value) */
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retl
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mov %o1, %o0 /* move return value to %o0 */
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/* NOTE: SPARCv9 manual calls the "swap" instruction deprecated. I don't
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understand why. "cas" could fail, when really, we don't care if the
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value changed, we care about ensuring that only 1 thread gets that value,
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i.e. if 3 threads execute "swap" at the same time using 3 different values,
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it is undefined which value is the final value, but each thread gets a
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different value (thus, it is atomic).
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*/
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/* int SST_Atomic_CAS(volatile int* dest, int compare, int newValue) */
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SST_Atomic_CAS:
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SST_Atomic_CASPtr:
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cas [%o0], %o1, %o2
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retl
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mov %o2, %o0
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/* void* SST_Atomic_ExchangeAdd(volatile void* x, int value) */
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/* int SST_Atomic_(volatile int* x, int value) */
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SST_Atomic_ExchangeAdd:
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SST_Atomic_ExchangeAddPtr:
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ld [%o0], %o4 /* o4 = *x */
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1:
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add %o1, %o4, %o5 /* o5 = *x + value */
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cas [%o0], %o4, %o5 /* compare and swap */
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cmp %o4, %o5 /* compare what was in mem with our value */
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bne,a,pn %icc, 1b /* not the same -> try again. */
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mov %o5, %o4 /* restore o4, it should contain *x */
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/* membar #StoreStore | #StoreLoad Force stores to complete before loads */
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retl /* Success */
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mov %o4, %o0 /* %o4 = value before add */
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/* int SST_Atomic_LoadAcquire(const volatile int* src); */
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/* void* SST_Atomic_LoadAcquirePtr(const volatile void** src); */
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SST_Atomic_LoadAcquire:
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SST_Atomic_LoadAcquirePtr:
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ld [%o0], %o0
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membar #LoadStore | #LoadLoad
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retl
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nop
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/* void SST_Atomic_StoreRelease(volatile int* dest, int value); */
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/* void SST_Atomic_StoreReleasePtr(volatile void** dest, void* value); */
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SST_Atomic_StoreRelease:
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SST_Atomic_StoreReleasePtr:
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membar #LoadStore | #StoreStore
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retl
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st %o1, [%o0]
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