42 lines
965 B
NASM
42 lines
965 B
NASM
@ SST_CPUCache_arm.asm
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@ Author: Patrick Baggett <ptbaggett@762studios.com>
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@ Created: 6/21/2012
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@
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@ Purpose:
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@
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@ 32-bit assembly for ARMv6+ CPU cache functions. Assembles with GNU as
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@
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@ License:
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@
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@ This program is free software. It comes without any warranty, to
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@ the extent permitted by applicable law. You can redistribute it
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@ and/or modify it under the terms of the Do What The Fuck You Want
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@ To Public License, Version 2, as published by Sam Hocevar. See
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@ http://sam.zoy.org/wtfpl/COPYING for more details.
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.text
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@ ELF symbol names
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.global SST_OS_GetCacheLineSize
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.global SST_OS_FlushDCRange
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.global SST_OS_InvalidateICRange
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.global SST_OS_SyncCache
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@ uint32_t SST_OS_GetCacheLineSize()
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SST_OS_GetCacheLineSize:
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bx lr
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@ void SST_OS_FlushDCRange(void* base, size_t range)
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SST_OS_FlushDCRange:
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bx lr
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@ void SST_OS_InvalidateICRange(void* base, size_t range)
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SST_OS_InvalidateICRange:
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bx lr
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@ void SST_OS_SyncCache()
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SST_OS_SyncCache:
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bx lr
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